0 Giving Semantics to VHDL: An Introduction. - 1 VHDL. - 2 Semantics. - 3 A Running Example. - 4 Contents of this book. - 1 A Functional Semantics for Delta-Delay VHDL Based on Focus. - 1 Introduction. - 2 A Motivating Example. - 3 Assumptions. - 4 Formal Semantics for ?-VHDL. - 5 Conclusion. - Appendix A Syntax of ?-VHDL. - 2 A Functional Semantics for Unit-Delay VHDL. - 1 Introduction. - 2 The VHDL Subset. - 3 Functional Semantics. - 4 Summary and Future Work. - Appendix A Auxiliary Function Definitions. - 3 An Operational Semantics for a Subset of VHDL. - 1 Introduction. - 2 Related Research. - 3 Syntax. - 4 Operational Semantics. - 5 Information Organization. - 6 Rules of the Semantics. - 7 Equivalence. - 8 A NAND Gate. - 9 Conclusions. - 4 A Formal Definition of an Abstract VHDL'93 Simulator by EA-Machines. - 1 Introduction. - 2 Related Work. - 3 EA-Machines. - 4 The Formal Model. - 5 Example. - 6 Conclusion & Future Directions. - Appendix A Elaborated Example. - 5 A Formal Model of VHDL Using Coloured Petri Nets. - 1 Introduction. - 2 VHDL Event-Driven Simulation. - 3 The VHDL Execution Model. - 4 Variables Types and Expressions. - 5 Statements Subprograms and Processes. - 6 Implementation of a CPN Model Generator. - 7 Conclusions. - 6 A Deterministic Finite-State Model for VHDL. - 1 Introduction. - 2 Generation of the Finite-State Model. - 3 Conclusion. - Appendix A Elaborated Running Example. - Appendix B Utility Functions. - 7 A Flow Graph Semantics of VHDL: A Basis for Hardware Verification with VHDL. - 1 Introduction. - 2 Flow Graph Model. - 3 Semantics of VHDL. - 4 The Example. - 5 Verification. - 6 Conclusion and Future Work. - References. Language: English