Cache and Interconnect Architectures in Multiprocessors

TLB Consistency and Virtual Caches. - The Cost of TLB Consistency. - Virtual-Address Caches in Multiprocessors. - Simulation and Performance Studies Cache Coherence. - A Critique of Trace-Driven Simulation for Shared-Memory Multiprocessors. - Performance of Symmetry Multiprocessor System. - Analysis of Cache Invalidation Patterns in Shared-Memory Multiprocessors. - Memory-Access Penalties in Write-Invalidate Cache Coherence Protocols. - Performance of Parallel Loops using Alternate Cache Consistency Protocols on a Non-Bus Multiprocessor. - Predicting the Performance of Shared Multiprocessor Caches. - Cache Coherence Protocols. - The Cache Coherence Protocol of the Data Diffusion Machine. - SCI (Scalable Coherent Interface) Cache Coherence. - Interconnect Architectures. - Performance Evaluation of Wide Shared Bus Multiprocessors. - Crossbar-Multi-processor Architecture. - CHESS MultiprocessorA Processor-Memory Grid for Parallel Programming. - Software Cache Coherence Schemes. - Software-directed Cache Management in Multiprocessors. Language: English